The present invention relates to semiconductor resistors of the type typically used in random access memories.
A static RAM cell includes a flip-flop and two load resistors. Each resistor is coupled to a voltage source at one side, and the other side is coupled to the gate of one of the FET transistors forming the flip-flop. It is also connected to the source of the other FET whose drain is connected typically to ground. Typically, the resistance range in static RAMS has been on the order of 50 gigaohms. However, this resistance is too high for VLSI such as 16k static RAMS. The problem is that with a high resistance, as the memory cells get smaller in size, the leakage increases. If the transistor leaks, current is drawn from the power supply and results in a voltage drop across the resistor. If the voltage drop is too high, the flip-flop can change state. Therefore, it is desirable to use a lower resistance to minimize the possibility of the flip-flop in a memory cell changing state spuriously, thereby causing a potentially disastrous result of changing the stored data. Thus, the lower resistance masks more leakage current than a higher resistance, and is therefore desirable.
On the other hand, if the resistance is lowered too much, the memory cell draws too much power and can lead to malfunctioning. There is a maximum current which should be respected for a memory device. For example, for a 16k RAM, a single memory cell should have an upper limit of its current draw at about 1.2 microamps.
FIG. 1 is a sketch which illustrates the curve of resistance versus impurity dose for a normal polysilicon doped resistor. As can be seen, this curve includes a major portion where as the dose increases, the resistance climbs slowly along a slightly inclined plateau. In this part of the curve, the resistance is not very sensitive to dosage variations. The general resistance range of that major portion of the curve is too high for VLSI load resistors. Lower resistances occur in the minor portion of the curve, which has a very large change in resistance with respect to the change in dosage. A portion 10 shows the preferred resistance range for VLSI memory cell resistors.
In the past, the art has suffered the high resistance and consequent large voltage drop and low masking ability. Alternatively, the prior art has lowered the resistance by increasing the implant of N dopant such as phosphorus which pushes the resistor over the transition point shown in FIG. 1. However, many problems are still found to exist with the resistance lowered in this fashion.
When passivation occurs to fill in holes and seal off the part by an oxide such as silox or a nitride, the resistance can decrease by a factor of 100. Mere packaging has resulted in a change by a factor of hundreds or even as much as a factor of 2000. These changes are not regular, and prior to the present invention, were a substantial problem. Another problem is that at high temperatures, the resistance drops so low that too much current is drawn.
Therefore, the main object of the present invention is to provide a suitable resistor for use in a VLSI memory cell which can provide good leakage over a wide temperature range.
Further objects are to provide a resistor which does not have as steep a curve of resistance versus dosage in the desired working area, and to provide a structure which is less sensitive to impurities.